Explain memory consistency models: sequential, TSO, and relaxed.

Memory models define how memory operations appear to execute across processors. Sequential consistency: all processors see same order, matches program order - simple but slow. TSO (Total Store Order, x86): reads may pass older writes to different addresses - allows store buffers. Relaxed (ARM, POWER): extensive reordering allowed - needs explicit barriers. Compilers also reorder. Understanding models is crucial for lock-free programming. Languages provide memory_order semantics to control this.