Setup and Hold Time | Digital Electronics Interview | Skill-Lync Resources
Medium Digital Electronics Sequential Circuits

What are setup time and hold time, and what happens when they are violated?

Answer

Setup time (tsu) is the minimum time data must be stable before the clock edge; hold time (th) is the minimum time data must remain stable after the clock edge. Setup violation occurs when data changes too close to clock edge, causing metastability where the flip-flop output may settle to an unpredictable value or oscillate. Hold violation occurs when data changes too soon after clock edge, causing the flip-flop to capture wrong data. Both violations cause unreliable circuit operation and must be avoided through proper timing design.

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