What are mixed-criticality systems and how are they designed?

Mixed-criticality systems run tasks with different safety/importance levels on shared hardware, common in automotive and aerospace. Criticality levels: Automotive (ASIL A-D), Aviation (DAL A-E), Generic (SIL 1-4). Higher criticality requires more rigorous verification. Design approaches: Temporal partitioning: Time slices allocated to criticality levels; hypervisor enforces schedule (ARINC 653). Spatial partitioning: Memory isolation via MPU/MMU; separate address spaces. Criticality-aware scheduling: High-criticality tasks have guaranteed resources; low-criticality can be degraded under overload. Certification considerations: Freedom from interference demonstration. Worst-case analysis includes lower-criticality interference. Higher criticality code smaller, more thoroughly tested. Platforms: INTEGRITY RTOS, PikeOS, LynxOS, AUTOSAR on hypervisor. Challenges: Resource efficiency vs isolation, WCET analysis across criticalities, graceful degradation strategies.