How do you optimize a Low-Noise Amplifier (LNA) design for noise figure and linearity?

LNA design requires balancing noise figure (NF), gain, linearity (IIP3), power consumption, and input matching. Noise optimization: Select optimal source impedance (Zopt, not necessarily 50 ohm), use inductive source degeneration for simultaneous noise and impedance matching, minimize parasitic resistances, and choose appropriate bias current. Linearity optimization: Higher bias improves IIP3 but increases power, use negative feedback carefully (helps linearity but may degrade NF), and optimize transistor size. Trade-offs: NF and IIP3 often conflict; use cascaded stages with high-linearity second stage. Simulate S-parameters, NF, and IP3 across frequency and temperature.