What are the principles of asynchronous (clockless) circuit design?

Asynchronous circuits use handshaking instead of global clock. Styles include: Bundled data (data with matched-delay request/acknowledge), Dual-rail (encode both data and completion), and QDI (quasi-delay-insensitive, robust to delays). Advantages: No clock distribution, average-case performance, low EMI, natural for interfacing with asynchronous world. Challenges: Complex design/verification methodology, hazard elimination, limited tool support, and difficult testing. Key concepts: Muller C-element (outputs 1 when all inputs 1, 0 when all 0, holds otherwise), completion detection, and handshake protocols (4-phase, 2-phase). Used in low-power and high-security applications.