What factors affect interrupt latency in embedded systems?

Interrupt latency is time from interrupt request to ISR execution start. Contributing factors: Hardware latency (interrupt recognition, pipeline flush, stacking), Interrupt priority (pending higher-priority interrupts delay lower ones), Instruction completion (current instruction must finish), Critical sections (interrupts disabled for mutual exclusion), Interrupt controller overhead (NVIC processing), and Cache/memory access time. Optimization: Keep ISRs short, minimize critical sections, use appropriate priorities, use tail-chaining (Cortex-M), and consider DMA for data movement. Typical Cortex-M latency: 12-16 cycles.